Modeling and characterization of novel MOS devices

Stefan Persson
Abstract & Cover

Challenges with integrating high-κ gate dielectric, retrograde Si1-xGex channel and silicided contacts in future CMOS technologies are investigated experimentally and theoretically in this thesis. pMOSFETs with either Si or strained Si1-xGex surface-channel and different high-κ gate dielectric are examined. Si1-xGex pMOSFETs with an Al2O3/HfAlOx/Al2O3 nano-laminate gate dielectric prepared by means of Atomic Layer Deposition (ALD) exhibit a great-than-30% increase in current drive and peak transconductance compared to reference Si pMOSFETs with the same gate dielectric. A poor high-κ/Si interface leading to carrier mobility degradation has often been reported in the literature, but this does not seem to be the case for our Si pMOSFETs whose effective mobility coincides with the universal hole mobility curve for Si. For the Si1-xGex pMOSFETs, however, a high density of interface states giving rise to reduced carrier mobility is observed. A method to extract the correct mobility in the presence of high-density traps is presented. Coulomb scattering from the charged traps or trapped charges at the interface is found to play a dominant role in the observed mobility degradation in the Si1-xGex pMOSFETs. Studying contacts with metal silicides constitutes a major part of this thesis. With the conventional device fabrication, the Si1-xGex incorporated for channel applications inevitably extends to the source-drain areas. Measurement and modeling show that the presence of Ge in the source/drain areas positively affects the contact resistivity in such a way that it is decreased by an order of magnitude for the contact of TiW to p-type Si1-xGex/Si when the Ge content is increased from 0 to 30 at. %. Modeling and extraction of contact resistivity are first carried out for the traditional TiSi2-Si contact but with an emphasis on the influence of a Nb interlayer for the silicide formation. A two-dimensional numerical model is employed to account for effects due to current crowding. For more advanced contacts to ultra-shallow junctions, Ni-based metallization scheme is used. NiSi1-xGex is found to form on selectively grown p-type Si1-xGex used as low-resistivity source/drain. Since the formed NiSi1-xGex with a specific resistivity of 20 µΩcm replaces a significant fraction of the shallow junction, a three-dimensional numerical model is employed in order to take the complex interface geometry and morphology into account. The lowest contact resistivity obtained for our NiSi1-xGex/p-type Si1-xGex contacts is 5×10-8 Ωcm2 , which satisfies the requirement for the 45-nm technology node in 2010. When the Si1-xGex channel is incorporated in a MOSFET, it usually forms a retrograde channel with an undoped surface region on a moderately doped substrate. Charge sheet models are used to study the effects of a Si retrograde channel on surface potential, drain current, intrinsic charges and intrinsic capacitances. Closed-form solutions are found for an abrupt retrograde channel and results implicative for circuit designers are obtained. The model can be extended to include a Si1-xGex retrograde channel. Although the analytical model developed in this thesis is one-dimensional for long-channel transistors with the retrograde channel profile varying along the depth of the transistor, it should also be applicable for short-channel transistors provided that the short channel effects are perfectly controlled.

Source of Information
Jonas Sundqvist
KTH Royal Institute of Technology,Superseded Departments, Microelectronics and Information Technology, IMIT.
(Stockholm, Sweden)
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