In-situ RHEED and characterization of ALD Al2O3 gate dielectrics

Author
Radko Bankras
Year
2006
Abstract & Cover

Since the introduction of the MOSFET transistor (metal-oxide-silicon field ef fect transistor) in 1960, the semiconductor technology underwent rapid devel opment. This advancement consisted mainly of the capability to make tran sistors with ever decreasing dimensions and resulted in integrated circuits like the current Intel pentium 4 processor with 178 million transistors. The down scaling continuously improved not only the complexity and speed, but also for example the energy consumption and cost price, to become attractive to end users. While the current characteristic dimension of a MOSFET transistors is about 100 nm, this was a factor 100 larger about 30 years ago. By now, a number of physical limits have been reached and further development of the transistor is not possible without drastic changes to the production process. The goal of this project was to contribute to the solution of an important barrier in the progress of semiconductor technology. Downscaling has resulted in a SiO2 gate dielectric layer of only a few atomic layers thick. Electrons are able to tunnel through this layer at relatively low operating voltage, resulting in an unacceptable high energy consumption of chips. A solution can be found in the dielectric constant of the material: a higher dielectric constant allows 

Source of Information
Alexey Kovalgin
University
University of Twente
(Enschede, Netherlands)
External Link
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