May 02, 2022, pp. 1-6
- SAMPLE DOCUMENT - Low-temperature atomic-layer-deposition lift-off method for microelectronic and nanoelectronic applications
We report a method for depositing patterned dielectric layers with submicron features using atomic layer deposition. The patterned films are superior to sputtered or evaporated films in continuity, smoothness, conformality, and minimum feature size. Films were deposited at 100–150 °C using several different precursors and patterned using either electron-beam or photoresist. The low deposition temperature permits uniform film growth without significant outgassing or hardbaking of resist layers. A lift-off technique presented here gives sharp step edges with edge roughness as low as 10 nm. We also measure dielectric constants (k) and breakdown fields for the high-k materials aluminum oxide (k~8–9), hafnium oxide (k~16–19), and zirconium oxide (k~20–29), grown under similar low temperature conditions.